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Wireless Components
3-Band TV Tuner IC TUA6030, TUA6032 Version 2.1
Specification July 2001
Revision History: Current Version: Preliminary Data Sheet,V1.1, August 2000 Previous Version:Target Data Sheet, V1.0, November 1999 Page (in previous Version) all Product Info 4-2 4-3 5-2 5-5 5-8,5-9, 5-10 5-10 Page (in current Version) all Product Info 4-2 4-3 5-2 5-5 5-8,5-9, 5-10 5-10 Subjects (major changes since last revision)
Version to V1.1, status to preliminary Ordering code added. Div. components changed. Div. components changed. Junction temperature and storage temperature +125 C max. Bus inputs SCL, SDA: VIH = 2.3 V. Input conductance, input capacitance corrected. Phase noise @ 1 kHz frequency offset deleted. Phase noise, LOW band oscillator: OSC = 92 dBc/Hz min @ 10 kHz. Phase noise, MID band oscillator: OSC = 92 dBc/Hz min @ 10 kHz. Phase noise @ 1 kHz frequency offset deleted. Phase noise, HIGH band oscillator: OSC = 87 dBc/Hz min. Table 5-5, Description of Symbols: CP and OS 'default' added Table 5-5, Test Modes: Normal operation 'default' added. Table 5-5, Description of Symbols: CP and OS 'default' added. Table 5-5, Test Modes: Normal operation 'default' added. Table 5-10, A to D converter levels, footnote 'No erratic codes in the transition' added, Table 5-1, Defaults at power-on reset, Auxiliary byte, bit5 = 1. Smith charts added.. Tbf's replaced .
5-11
5-11
5-14 5-15 5-14 5-15 5-16 5-18, 5-19, 5-20 div
5-14 5-15 5-14 5-15 5-16 5-18, 5-19, 5-20 div
Revision History: Current Version: Data Sheet, V2.0, March 2001 Previous Version:Preliminary Data Sheet, V1.1, August 2000 all 3-3 4-2, 4-3 5-2 5-6 5-11 all 3-3 4-2, 4-3 5-2 5-6, 5-7 5-11 Version to V2.0, preliminary deleted LOW-/MID Oscillator: DC levels corrected Application circuits modified New definition of thermal properties. Saturation Voltages for P0, 2, 3 added AGC take-over point: Min/max values added. Mixer output impedance: Values added
Revision History: Current Version: Preliminary Data Sheet,V1.1, August 2000 5-11, 5-12 5-16 5-18 5-11, 5-12 5-16 5-18 Phase noise corrected Table 5-1, Defaults at power-on reset, Auxiliary byte, bit5 = 1. More telegram examples
Revision History: Current Version: Data Sheet, V2.1, July 2001 Previous Version:Preliminary Data Sheet, V2.0, March 2001 all all Mirror imaged version TUA6032 added
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TUA6030, TUA6032
Product Info
Product Info
General Description The TUA6030, TUA6032 devices com- Package bine a mixer-oscillator block with a digitally programmable phase locked loop (PLL) for use in TV and VCR tuners. General
s
Features
Suitable for PAL/NTSC and Digital Video Broadcasting
Wideband AGC detector for internal tuner AGC - 5 programmable take-over points PLL - 2 programmable time constants 2 s 4 independent I C addresses s Full ESD protection 2 s I C bus protocol compatible with Mixer/Oscillator 3.3 V and 5V micro-controllers up to 400 kHz s High impedance mixer input (common emitter) for LOW band s Short lock-in time s Low impedance mixer input (coms High voltage VCO tuning output mon base) for MID band s 4 PNP ports s Low impedance mixer input (common base) for HIGH band s 3 NPN ports
s s s s
2 pin oscillator for LOW band 2 pin oscillator for MID band 4 pin oscillator for HIGH band
s s
1 NPN port/ADC input Internal LOW/MID/HIGH band switch Lock-in flag Programmable reference divider ratio (24, 64, 80, 128) Programmable charge pump current The AGC stage makes the tuner AGC independent of the Video-IF AGC.
IF-Amplifier
s
s s
IF preamplifier with symmetrical 75 output impedance able to drive a SAW filter (500 //40 pF)
s
Application
s
The IC is suitable for PAL and NTSC tuners in TV- and VCR-sets or set-top receivers for analog TV and Digital Video Broadcasting.
s
Ordering Information
Type Ordering Code Package
TUA6030 TUA6032
Q67037-A1146 (tape and reel) Q67037-Axxxx (tape and reel)
P-TSSOP-38 P-TSSOP-38
Wireless Components
Product Info
Specification, July 2001
1
Table of Contents
1 2 2.1 2.2 2.3 2.4 3 3.1 3.2 3.3 3.4 4 4-1 4-2 5 5.1 5.1.1 5.1.2 5.1.3 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12 Pin Definition and Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23 Application Circuit for NTSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24 Application Circuit for PAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26 . . . . . . . 5-27 . . . . . . . 5-27 . . . . . . . 5-29 . . . . . . . 5-30
5.2 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-4 Bit Allocation Read / Write . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-5 Description of Symbols. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-6 Address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-7 Test modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-8 Reference divider ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-9 AGC take-over point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-10 A to D converter levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 Table 5-11 Defaults at power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 Table 5-12 Internal band selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 5.3 5.4 5.4.1 5.4.2 5.4.3 I2C Bus Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-42 Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-43 Input admittance (S11) of the LOW band mixer (40 to 140 MHz). . . 5-43 Input impedance (S11) of the MID band mixer (150 to 455 MHz) . . 5-43 Input impedance (S11) of the HIGH band mixer (450 to 865 MHz) . 5-44
Wireless Components
1-5
Specification, July 2001
TUA6030, TUA6032
Table of Contents
5.4.4 Output admittance (S22) of the of the Mixer output (30 to 50 MHz) . 5-44 5.4.5 Output impedance (S22) of the IF amplifier (30 to 50 MHz) . . . . . . . 5-45 5.5 5.5.1 5.5.2 5.5.3 5.5.4 5.5.5 5.5.6 5.5.7 5.5.8 Measurement Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-46 Gain (GV) measurement in LOW band. . . . . . . . . . . . . . . . . . . . . . . 5-46 Gain (GV) measurement in MID and HIGH bands . . . . . . . . . . . . . . 5-46 Matching circuit for optimum noise figure in LOW band . . . . . . . . . . 5-47 Noise figure (NF) measurement in LOW band . . . . . . . . . . . . . . . . . 5-47 Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . 5-48 Cross modulation measurement in LOW band . . . . . . . . . . . . . . . . . 5-48 Cross modulation measurement in MID and HIGH bands . . . . . . . . 5-49 Ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 5-49
Wireless Components
1-6
Specification, July 2001
2
Product Description
Contents of this Chapter 2.1 2.2 2.3 2.4 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Wireless Components
2-7
Specification, July 2001
TUA6030, TUA6032
Product Description
2.1 Overview
The TUA6030, TUA6032 devices combine a mixer-oscillator block with a digitally programmable phase locked loop (PLL) for use in TV and VCR tuners. The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator for the HIGH band, an IF amplifier, a reference voltage, and a band switch. The PLL block with four independently selectable chip addresses forms a digitally programmable phase locked loop. With a 4 MHz quartz crystal, the PLL permits precise setting of the frequency of the tuner oscillator up to 1024 MHz in increments of 31.25, 50, 62.5 or 166.7 kHz. The tuning process is controlled by a microprocessor via an I2C bus. The device has 8 output ports, one of them (P6) can also be used as ADC input port. A flag is set when the loop is locked. The lock flag can be read by the processor via the I2C bus.
2.2 Features
General
s s
Suitable for PAL/NTSC and Digital Video Broadcasting Wideband AGC detector for internal tuner AGC - 5 programmable take-over points - 2 programmable time constants Full ESD protection
s
Mixer/Oscillator
s s s s s s
High impedance mixer input (common emitter) for LOW band Low impedance mixer input (common base) for MID band Low impedance mixer input (common base) for HIGH band 2 pin oscillator for LOW band 2 pin oscillator for MID band 4 pin oscillator for HIGH band IF preamplifier with symmetrical 75 output impedance able to drive a SAW filter (500 //40 pF) 4 independent I2C addresses I2C bus protocol compatible with 3.3 V and 5V micro-controllers up to 400 kHz
IF-Amplifier
s
PLL
s s
Wireless Components
2-8
Specification, July 2001
TUA6030, TUA6032
Product Description
s s s s s s s s s
Short lock-in time High voltage VCO tuning output 4 PNP ports 3 NPN ports 1 NPN port/ADC input Internal LOW/MID/HIGH band switch Lock-in flag Programmable reference divider ratio (24, 64, 80, 128) Programmable charge pump current
2.3 Application
s
The IC is suitable for PAL and NTSC tuners in TV- and VCR-sets or cable set-top receivers for analog TV and Digital Video Broadcasting. The AGC stage makes the tuner AGC independent of the Video-IF AGC.
s
Recommended band limits in MHz:
Table 2-1 NTSC tuners RF input Band LOW MID HIGH min 55.25 133.25 367.25 max 127.25 361.25 801.25 Oscillator min 101 179 413 max 173 407 847
Table 2-2 PAL tuners RF input Band LOW MID HIGH min 44.25 161.25 447.25 max 154.25 439.25 863.25 Oscillator min 83.15 200.15 486.15 max 193.15 478.15 902.15
Note: Tuning margin of
K3 MHz not included.
Wireless Components
2-9
Specification, July 2001
TUA6030, TUA6032
Product Description
2.4 Package Outlines
P-TSSOP-38
Wireless Components
2 - 10
Specification, July 2001
3
Functional Description
Contents of this Chapter 3.1 3.2 3.3 3.4 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12 Pin Definition and Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
TUA6030, TUA6032
Functional Description
3.1 Pin Configuration
O SCLOW OUT OSCLOWIN OSCGND OSCMIDIN O SCMIDOUT O SCHIGHIN OSCHIG HOUT OSCHIG HOUT O SCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P5 P7 XTAL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
38 37 36 35 34 33 32 31 30
HIGHIN HIGHIN MIDIN MIDIN LOWIN RFGND MIXOUT MIXOUT P2 AG C GND SDA SCL AS P1 P0 P3 P4 P6/ADC
TUA6030
29 28 27 26 25 24 23 22 21 20
TUA6030 Pin_config
Figure 3-1
Pin Configuration TUA6030
HIGHIN HIGHIN MIDIN MIDIN LOWIN RFGND MIXOUT MIXOUT P2 AGC GND SDA SCL AS P1 P0 P3 P4 P6/ADC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
38 37 36 35 34 33 32 31 30
OSCLOW OUT OSCLOW IN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT OSCHIGHIN VCC IFGND IFOUT IFOUT PLLG ND VT CP P5 P7 XTAL
TUA6032
29 28 27 26 25 24 23 22 21 20
TUA6032 Pin_config
Figure 3-2
Pin Configuration TUA6032
Wireless Components
3 - 12
Specification, July 2001
TUA6030, TUA6032
Functional Description
3.2 Pin Definition and Function
Remark: First pin number refers to TUA6030, second to TUA6032
Table 3-1 Pin Definition and Function Pin No. Symbol Equivalent I/O-Schematic Average DC voltage LOW OSCLOWOUT 2.2 V MID HIGH
1/38
1/38
OSCLOWIN
2/37
1.5 V
2/37
3/36
OSCGND OSCMIDIN
oscillator ground
0.0 V
0.0 V 1.5 V
0.0 V
4/35
5/34
OSCMIDOUT
4/35
2.2 V
5/34
Wireless Components
3 - 13
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued) Pin No. Symbol Equivalent I/O-Schematic Average DC voltage LOW 6/33 OSCHIGHIN 1.8 V 7/32 OSCHIGOUT
7/32 8/31
MID
HIGH
2.2 V
8/31
OSCHIGOUT
6/33 9/30
2.2 V
9/30
OSCHIGHIN 1.8 V
10/29 11/28 12/27
VCC IFGND IFOUT
supply voltage IF ground
5.0 V 0.0 V 2.1 V
5.0 V 0.0 V 2.1 V
5.0 V 0.0 V 2.1 V
13/26
IFOUT
12/27 13/26
2.1 V
2.1 V
2.1 V
14/25 15/24
PLLGND VT
PLL ground
0.0 V
0.0 V
0.0 V
VT
VT
VT
16/23
CP
15/24
16/23
1.9 V
1.9 V
1.9 V
Wireless Components
3 - 14
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued) Pin No. Symbol Equivalent I/O-Schematic Average DC voltage LOW 17/22 P5
17/22 or 18/21
MID 5 V or VCE
HIGH 5 V or VCE
5 V or VCE
18/21
P7
5 V or VCE
5 V or VCE
5 V or VCE
19/20
XTAL
3.3 V
3.3 V
3.3 V
19/20
20/19
P6/ADC
5 V or VCE
5 V or VCE
5 V or VCE
20/19
21/18
P4
21/18
5 V or VCE
5 V or VCE
5 V or VCE
22/17
P3
n.a.
n.a.
0 V or VCC VCE n.a. n.a.
23/16 24/15
P0 P1
22/17 or 23/16 or 24/15
VCC VCE n.a.
n.a. VCC VCE
Wireless Components
3 - 15
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued) Pin No. Symbol Equivalent I/O-Schematic Average DC voltage LOW 25/14 AS VAS MID VAS HIGH VAS
25/14
26/13
SCL
n.a.
n.a
n.a
26/13
27/12
SDA
n.a
n.a
n.a
27/12
28/11
GND
ground
0.0
0.0
0.0
Wireless Components
3 - 16
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued) Pin No. Symbol Equivalent I/O-Schematic Average DC voltage LOW 29/10 AGC 3.0 V MID 3.0 V HIGH 3.0 V
29/10
30/9
P2
n.a.
n.a.
0 V or VCC VCE
30/9
31/8
MIXOUT
4.0 V
4.0 V
4.0 V
32/7
MIXOUT
31/8
32/7
4.0 V
4.0 V
4.0 V
Oscillator
33/6 34/5
RFGND LOWIN
IF ground
0.0 V 1.9 V
0.0 V
0.0 V
34/5
Wireless Components
3 - 17
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued) Pin No. Symbol Equivalent I/O-Schematic Average DC voltage LOW 35/4 MIDIN MID 0.75 V HIGH
36/3
MIDIN
35/4
36/3
0.75 V
37/2
HIGHIN
0.75 V
38/1
HIGHIN
37/2
38/1
0.75 V
Wireless Components
3 - 18
Specification, July 2001
TUA6030, TUA6032
Functional Description
3.3 Block Diagram
Remark: First pin number refers to TUA6030, second to TUA6032
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT OSCHIGHIN
1/38 2/37 3/ 36 4/35 5/34
P1
38/1 Oscillator LOW Mixer HIGH RF Input HIGH 37/2 36/3 35/4
P1
HIGHIN HIGHIN MIDIN MIDIN LOWIN
P0
P0.P1
Oscillator MID
Mixer MID
RF Input MID
34/5
6/ 33 7/ 32 8/31 9/ 30
VCC
Oscillator HIGH
Mixer LOW
RF Input LOW
33 RFGND /6 32/7 31/8
MIXOUT MIXOUT P2 AGC GND SDA SCL AS P1 P0 P3 P4 P6/ADC
TUA6030_1 BlockDiag
P0.P1
P0
SAW Driver 30/9 29/ 10 28/ 11 I2C Bus
FL
VCC 10/ 29 IFGND 11/ 28 IFOUT IFOUT
ATC
AGC Detector
AGC
12/27 13/26
Prog. Divider Lock Detector
27/ 12 26/ 13 25/ 14
fdiv
PLLGND 14/ 25 VT 15/ 24 CP P5 P7 XTAL
Charge Pump
Phase/ Freq Comp
CP, OS
fref
PORTS
24/ 15 23/ 16 22/17
16/23 17/22 18/21 19/20
Crystal Oscillator
Reference Divider
ADC 21/18 20/19
Figure 3-3
Block Diagram
Wireless Components
3 - 19
Specification, July 2001
TUA6030, TUA6032
Functional Description
3.4 Circuit Description
3.4.1
Mixer-Oscillator block
The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator for the HIGH band, an IF amplifier, a reference voltage, and a band switch. Filters between tuner input and IC separate the TV frequency signals into three bands. The band switching in the tuner front-end is done by using three PNP port outputs. In the selected band the signal passes a tuner input stage with a MOSFET amplifier, a double-tuned bandpass filter and is then fed to the mixer input of the IC which has in case of LOW band a high-impedance input and in case of MID or HIGH band a low-impedance input. The input signal is mixed there with the signal from the activated on chip oscillator to the IF frequency which is filtered out at the balanced mixer output pair by means of a parallel tuned circuit. The following IF amplifier is capacitively coupled to the mixer outputs and has a low output impedance to drive the SAW filter directly.
3.4.2
PLL block
The oscillator signal is internally DC-coupled as a differential signal to the programmable divider inputs. The signal subsequently passes through a programmable divider with ratio N = 256 through 32767 and is then compared in a digital frequency/phase detector with a reference frequency fref = 31.25, 50, 62.5 or 166.7 kHz. This frequency is derived from an unbalanced, low-impedance 4 MHz crystal oscillator (pin XTAL) divided by 128, 80,64 or 24. The reference frequencies will be different with a quartz other than 4 MHz.
The phase detector has two outputs which drive two current sources of a charge pump. If the negative edge of the divided VCO signal appears prior to the negative edge of the reference signal, the positive current source pulses for the duration of the phase difference. In the reverse case the negative current source pulses. If the two signals are in phase, the charge pump output (CP) goes into the high-impedance state (PLL is locked). An active low-pass filter integrates the current pulses to generate the tuning voltage for the VCO (internal amplifier, external pull-up resistor at VT and external RC circuitry). The charge pump output is also switched into the high-impedance state if the control bits T2, T1,T0 = 0, 1, 0. Here it should be noted, however, that the tuning voltage can alter over a long period in the high impedance state as a result of self discharge in the peripheral circuity. VT may be switched off by the control bit OS to allow external adjustments.
If the VCO is not oscillating the PLL locks to a tuning voltage of 33V (VTH).
Wireless Components
3 - 20
Specification, July 2001
TUA6030, TUA6032
Functional Description
By means of control bit CP the pump current can be switched between two values by software. This programmability permits alteration of the control response of the PLL in the locked-in state. In this way different VCO gains can be compensated, for example. The software controlled ports P0 to P7 are general purpose open-collector outputs. The test bits T2, T1, T0 =1, 0, 0 switch the test signals fdiv (divided input signal) and fref (i.e.4 MHz / 64) to P4 and P5 respectively.
The lock detector resets the lock flag FL if the width of the charge pump current pulses is greater than the period of the crystal oscillator (i.e. 250 ns). Hence, if FL = 1, the maximum deviation of the input frequency from the programmed frequency is given by f = IP (KVCO / fXTAL) (C1+C2) / (C1C2) where IP is the charge pump current, KVCO the VCO gain, fXtal the crystal oscillator frequency and C1, C 2 the capacitances in the loop filter (Chapter 4). As the charge pump pulses at i.e. 62.5 kHz (= fref), it takes a maximum of 16 s for FL to be reset after the loop has lost lock state. Once FL has been reset, it is set only if the charge pump pulse width is less than 250 ns for eight consecutive fref periods. Therefore it takes between 128 and 144 s for FL to be set after the loop regains lock.
3.4.3
AGC
The wide-band AGC stage detects the level of the IF output signal and generates an AGC voltage for gain control of the tuner input transistors. The AGC take-over and the time constant are selectable by the I2C bus.
3.4.4
I2C-Bus Interface
Data is exchanged between the processor and the PLL via the I2C bus. The clock is generated by the processor (input SCL). Pin SDA functions as an input or output depending on the direction of the data (open collector, external pullup resistor). Both inputs have a hysteresis and a low-pass characteristic, which enhance the noise immunity of the I2C bus. The data from the processor pass through an I2C bus controller. Depending on their function the data are subsequently stored in registers. If the bus is free, both lines will be in the marking state (SDA, SCL are high). Each telegram begins with the start condition and ends with the stop condition. Start condition: SDA goes low, while SCL remains high. Stop condition: SDA goes high while
Wireless Components
3 - 21
Specification, July 2001
TUA6030, TUA6032
Functional Description
SCL remains high. All further information transfer takes place during SCL = low, and the data is forwarded to the control logic on the positive clock edge. The table 'Bit Allocation' (see Table 5-4 Bit Allocation Read / Write on page 39) should be referred to for the following description. All telegrams are transmitted byte-by-byte, followed by a ninth clock pulse, during which the control logic returns the SDA line to low (acknowledge condition). The first byte is comprised of seven address bits. These are used by the processor to select the PLL from several peripheral components (address select). The LSB bit (R/W) determines whether data are written into (R/W = 0) or read from (R/W = 1) the PLL.
In the data portion of the telegram during a WRITE operation, the MSB bit of the first or third data byte determines whether a divider ratio or control information is to follow. In each case the second byte of the same data type has to follow the first byte. Appropriate setting of the test bits will decide whether the bandswitch byte or the auxiliary byte will be transmitted (see Table 5-7 Test modes on
page 40).
If the address byte indicates a READ operation, the PLL generates an acknowledge and then shifts out the status byte onto the SDA line. If the processor generates an acknowledge, a further status byte is output; otherwise the data line is released to allow the processor to generate a stop condition. The status word consists of three bits from the A/D converter, the lock flag and the power-on flag. Four different chip addresses can be set by an appropriate DC level at pin AS (see Table 5-6 Address selection on page 40). While the supply voltage is applied, a power-on reset circuit prevents the PLL from setting the SDA line to low, which would block the bus. The power-on reset flag POR is set at power-on and if VCC falls below 3.2 V. It will be reset at the end of a READ operation.
Wireless Components
3 - 22
Specification, July 2001
4
Applications
Contents of this Chapter 4.1 4-1 4-2 Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24 Application Circuit for NTSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24 Application Circuit for PAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25
Wireless Components
4 - 23
Specification, July 2001
TUA6030, TUA6032
Applications
4.1 Circuits
Remark: Pinning refers to TUA6030
2k7
BB659C
2p2 1 2p7 2
1n
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT
HIGHIN HIGHIN MID MIDIN LOWIN
100p 12 L1
38 1n 37 1n
balun 1:1
HIGH TOKO B4F Input 617DB-1023
2k7
BB659C
3 1p5 4 1p2 5 1p2 6 1p2
36 1n 35
balun 1:1
MID TOKO B4F Input 617DB-1023 1n
82p 8R2 L2
34
LOW Input
12p
RFGND MIXOUT MIXOUT
1k8
33
68p
BB659C
L3
7 1p2 8
32
L4 68p
31 P2 150n 4n7 AGC
TUA6030
1k8
1p2 9 4n7
OSCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P5 P7 XTAL
P2 AGC
30
+5V 4n7 IFOUT
10
29
11
GND SDA
28 SDA 27 220 100p 26 220 100p 25 220 4n7 24 4n7 23 4n7 22 P0 P1 AS SCL
transformer 2:10
47n TOKO 7KL600 GCS-A1010DX
12 12p 13
SCL AS P1 P0 P3 P4 P6/ADC
14
560 + 33 V 33k P5 100n
C2 2n2 8k2
C1 15 100n 16
17 4n7
P3
4n7 21 4n7 20 4n7 P4
P7 4n7 4 MHz 18p
18
P6/ADC
19
App Circuit Ntsc
Figure 4-1
Application Circuit for NTSC
Recommended band limits in MHz
RF input min LOW MID HIGH 55.25 133.25 367.25 max 127.25 361.25 801.25 Oscillator min 101 179 413 max 173 407 847 L1 L2 L3 L4 turns 8.5 3.5 1.5 12.5
Coils
E
wire E 0.5 mm 0.5 mm 0.5 mm 0.3 mm
3.2 mm 2.5 mm 2.4 mm 3.5 mm
Wireless Components
4 - 24
Specification, July 2001
TUA6030, TUA6032
Applications
Remark: Pinning refers to TUA6030
2k7
BB659C
2p2 1
1n
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT OSCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P5 P7 XTAL
HIGHIN HIGHIN MID MIDIN LOWIN
100p 12 L1
2p7 2
38 1n 37 1n 36 1n 35
balun 1:1
HIGH Input TOKO B4F 617DB-1023
3 2k7 BB659C 1p5 4 82p 8R2 L2 1p2 5 1p2 6 1p2 L3 7 1p2 8 1k8 1p2 9 4n7 +5V 4n7 IFOUT 10
balun 1:1
MID TOKO B4F Input 617DB-1023
1n 34 LOW Input
15p
RFGND MIXOUT MIXOUT
1k8
33
68p
BB565
32
L4 68p
31 P2 150n 4n7 AGC
TUA6030
P2 AGC GND SDA
30
29
11
28 SDA 220 100p 26 220 100p 25 220 4n7 24 4n7 23 4n7 22 P3 P1 AS SCL
transformer 2:10
47n TOKO 7KL600 GCS-A1010DX
12 12p 13
27
SCL AS P1 P0 P3 P4 P6/ADC
14
560 + 33 V 33k P5 100n
C2 2n2 8k2
C1 15 100n 16
P0
17 4n7 18 4n7 4 MHz 18p 19
P7
4n7 21 4n7 20 4n7
P4
P6/ADC
App Circuit PAL
Figure 4-2
Application Circuit for PAL
Recommended band limits in MHz
RF input min LOW MID HIGH 44.25 161.25 447.25 max 154.25 439.25 863.25 Oscillator min 83.15 200.15 486.15 max 193.15 478.15 902.15 L1 L2 L3 L4 turns 8.5 2.5 1.5 14.5
Coils
E
wire E 0.5 mm 0.5 mm 0.5 mm 0.3 mm
3.2 mm 3 mm 2.4 mm 4 mm
Wireless Components
4 - 25
Specification, July 2001
5
Reference
Contents of this Chapter 5.1 5.1.1 5.1.2 5.1.3 Electrical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27 . . . . . . . 5-27 . . . . . . . 5-29 . . . . . . . 5-30
5.2 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-4 Bit Allocation Read / Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-5 Description of Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-6 Address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-7 Test modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-8 Reference divider ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-9 AGC take-over point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-10 A to D converter levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 Table 5-11 Defaults at power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 Table 5-12 Internal band selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 5.3 5.4 5.4.1 5.4.2 5.4.3 5.4.4 5.4.5 5.5 5.5.1 5.5.2 5.5.3 5.5.4 5.5.5 5.5.6 5.5.7 5.5.8 I2C Bus Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-42 Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-43 Input admittance (S11) of the LOW band mixer (40 to 140 MHz). . . 5-43 Input impedance (S11) of the MID band mixer (150 to 455 MHz) . . 5-43 Input impedance (S11) of the HIGH band mixer (450 to 865 MHz) . 5-44 Output admittance (S22) of the of the Mixer output (30 to 50 MHz) . 5-44 Output impedance (S22) of the IF amplifier (30 to 50 MHz) . . . . . . . 5-45 Measurement Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-46 Gain (GV) measurement in LOW band. . . . . . . . . . . . . . . . . . . . . . . 5-46 Gain (GV) measurement in MID and HIGH bands . . . . . . . . . . . . . . 5-46 Matching circuit for optimum noise figure in LOW band . . . . . . . . . . 5-47 Noise figure (NF) measurement in LOW band . . . . . . . . . . . . . . . . . 5-47 Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . 5-48 Cross modulation measurement in LOW band . . . . . . . . . . . . . . . . . 5-48 Cross modulation measurement in MID and HIGH bands . . . . . . . . 5-49 Ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 5-49
Wireless Components
5 - 26
Specification, July 2001
TUA6030, TUA6032
Reference
5.1 Electrical Data
5.1.1
Absolute Maximum Ratings
WARNING The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC may result.
Table 5-1 Absolute Maximum Ratings, ambient temperature TAMB = - 10C ... TAmax Parameter 1). Symbol Limit Values min Supply voltage Ambient temperature VCC TA -0.3 -10 max 6 TAmax
2).
Unit
Remarks
V C C C K
Storage temperature Junction temperature Temperature difference junction to case3). PLL CP
TStg TJ TJC
-40
+125 + 125 2
VCP ICP
-0.3
3 1 6
V mA V mA
Crystal oscillator pin XTAL
VQ IQ -5 -0.3
Bus input/output SDA Bus output current SDA Bus input SCL Chip address switch AS VCO tuning output (loop filter)
VSDA ISDA(L) VSCL VAS VVT
6 10
V mA V V V open collector
-0.3 -0.3 -0.3
6 6 35
Wireless Components
5 - 27
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-1 Absolute Maximum Ratings, ambient temperature TAMB = - 10C ... + 85C (continued) Parameter 1.) Symbol Limit Values min NPN port output voltage NPN port output current P6/ADC input/output voltage NPN port output current PNP port output voltage PNP port output current PNP port output current PNP port output current Total port output current of NPN ports Total port output current of PNP ports Mixer-Oscillator Mix inputs LOW band Mix inputs MID/HIGH band VLOW VMID/HIGH IMID/HIGH VCO base voltage VCO collector voltage ESD-Protection 4). all pins VESD 2 kV VB VC -5 -0.3 -0.3 3 2 6 3 6 V V mA V V LOW, MID and HIGH band oscillators LOW, MID and HIGH band oscillators VP4, 5, 7 IP4, 5, 7(L) VP6/ADC IP6/ADC(L) VP0, 1, 2, 3 IP1(L) IP0(L) IP2, 3(L) IP(L) IP(L) -0.3 -1 -0.3 -1 -0.3 +1 +1 +1 max 6 10 6 10 6 -25 -10 -5 40 -40 V mA V mA V mA mA mA mA mA open collector, tmax = 0.1 sec. at 5.5 V open collector open collector, tmax = 0.1 sec. at 5.5 V open collector, tmax = 0.1 sec. at 5.5 V open collector, tmax = 0.1 sec. at 5.5 V tmax = 0.1 sec. at 5.5 V tmax = 0.1 sec. at 5.5 V open collector open collector, tmax = 0.1 sec. at 5.5 V Unit Remarks
1). All values are referred to ground (pin), unless stated otherwise. Currents with a positive sign flow into the pin and currents with a negative sign flow out of pin. 2). The maximum ambient temperature depends on the mounting conditions of the package. Any application mounting must guarantee not to exceed the maximum junction temperature of 125 C. As reference the temperature difference junction to case is given. 3). Referred to top center of package. 4). According to EIA/JESD22-A114-B (HBM in-circuit test), as a single device in-circuit contact discharge test.
Wireless Components
5 - 28
Specification, July 2001
TUA6030, TUA6032
Reference
5.1.2
Operating Range
Within the operational range the IC operates as described in the circuit description. The AC / DC characteristic limits are not guaranteed.
Table 5-2 Operating Range Parameter Symbol Limit Values min Supply voltage Programmable divider factor LOW mixer input frequency range MID and HIGH band mixer input frequency range LOW oscillator frequency range MID band oscillator frequency range HIGH band oscillator frequency range Ambient temperature VCC N fMIXV fMIXU fOH fOU fOU TAMB +4.5 256 30 130 65 165 400 -10 max +5.5 32767 200 900 250 530 950 TAmax
1).
Unit
Test Conditions
L
Item
V
MHz MHz MHz MHz MHz C
1). see 5.1.1 Absolute Maximum Ratings on page 27
Wireless Components
5 - 29
Specification, July 2001
TUA6030, TUA6032
Reference
5.1.3
AC/DC Characteristics
Table 5-3 AC/DC Characteristics with TAMB = 25 C, VCC = 5V Symbol min Supply Supply voltage Current consumption VCC IVCC IVCC IVCC Digital Part PLL Crystal oscillator connections XTAL Crystal frequency Crystal resistance Input impedance Charge pump output CP High-level output current Low-level output current Tristate current Output voltage ICPH ICPL ICPZ VCP 1.0 280 60 +1 2.5 A A nA V CP = 1, VCP = 2 V CP = 0, VCP = 2 V T2, T1, T0 = 0, 1, 0, VCP = 2 V loop closed fXTAL RQ ZQ 3.2 25 -1000 -1200 4.0 4.48 300 MHz series resonance series resonance fXTAL = 4 MHz 4.5 5 73 75 66 5.5 V mA mA mA LOW band MID band HIGH band Limit Values typ max Unit Test Conditions L Item
Tuning voltage output VT (open collector) Leakage current Output voltage when the loop is closed, (test mode in normal operation) I2C-Bus Bus inputs SCL, SDA High-level input voltage Low-level input voltage High-level input current VIH VIL IIH IIH 2.3 0 5.5 1.5 10 V V A Vbus = 5.5 V, VCC = 0 V Vbus = 5.5 V, VCC = 5.5 V ITH VTL 0.4 10 32.7 A V VTH = 33 V, OS = 1 OS=0, RLoad = 33 k, tuning supply = 33 V
10
A
Wireless Components
5 - 30
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with TAMB = 25 C, VCC = 5V (continued) Symbol min Low-level input current IIL IIL Bus output SDA (open collector) Leakage current Low-level output voltage Low-level output voltage Edge speed SCL,SDA Rise time Fall time Clock timing SCL Frequency High pulse width Low pulse width Start condition Set-up time Hold time Stop condition Set up time Bus free Data transfer Set-up time Hold time Input hysteresis SCL, SDA Pulse width of spikes which are suppressed Capacitive load for each bus line tsudat thdat Vhys tsp CL 0 0.1 0 200 50 400 s s mV ns pF tsusto tbuf 0.6 1.3 s s tsusta thsta 0.6 0.6 s s fSCL tH tL 0 0.6 1.3 100 400 kHz s s tr tf 300 300 ns ns IOH VOL VOL 10 0.4 0.6 A V V VOH = 5.5 V IOL = 3 mA IOL = 6 mA at 400 kHz -10 Limit Values typ max 10 A A Vbus = 1.5 V, VCC = 0 V Vbus = 0 V, VCC = 5.5 V Unit Test Conditions L Item
PNP port outputs P0, P1, P2, P3 (open collector) Output leakage current Output saturation voltage port 0 Output saturation voltage port 1 IPOH0to3 VPL0 VPL1 0.25 0.25 -10 0.4 0.4 A V V VCC = 5.5 V IPOL0 = 10 mA IPOL1 = 15 mA
Wireless Components
5 - 31
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with TAMB = 25 C, VCC = 5V (continued) Symbol min Output saturation voltage ports 2, 3 VPL2 ,3 Limit Values typ 0.25 max 0.4 V IPOL2, 3 = 5 mA Unit Test Conditions L Item
NPN port outputs P4, P5, P6, P7 (open collector) Output leakage current Output saturation voltage ADC input ADC input voltage High-level input current Low-level input current VADC IADCH IADCL -10 0 5.5 10 V A A IPOH4to7 VPL04to7 0.25 10 0.4 A V VCC = 5.5, VPn4to7 = 6 V IPOL4to7 = 5 mA
Address selection input AS High-level input current Low-level input current Analog Part LOW band mixer mode (P0 = 1, P1 =0, including IF amplifier) RF frequency Voltage gain fRF GV GV Noise figure NF 44.25 23.5 23.5 26 26 8 170.25 28.5 28.5 10 MHz dB dB dB picture carrier 1). fRF = 44.25 MHz, see 5.5.1 on page 46 fRF = 170.25 MHz, see 5.5.1 on page 46 fRF = 50 MHz, see 5.5.4 on page 47, see 5.5.3 on page 47 fRF = 44.25 MHz, see 5.5.6 on page 48 fRF = 170.25 MHz, see 5.5.6 on page 48 fRF = 44.25 MHz 2). fRF = 170.25 MHz 2.) fRF = 170.25 MHz 3). IASH IASL -50 50 A A VASH = 5.5 V VASL = 0 V
Output voltage causing 0.3% of crossmodulation in channel
VO VO VO VO
108 108 108 108
111 111 111 111 2.12
dBV dBV dBV dBV kHz
Output voltage causing 1.1 kHz incidental FM Local oscillator FM caused by I C communication 750 Hz Pulling Channel S02 beat
2
FMI2C
Vi INTS02
88 57 60
dBV dBc
fRF = 154.25 MHz 4). VRFpix = 115 dBV at IF output 5).
Wireless Components
5 - 32
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with TAMB = 25 C, VCC = 5V (continued) Symbol min Channel A-5 beat INTA-5 INTCH6 57 Limit Values typ 60 max dBc VRFpix = 115 dBV at IF output 6). Channel CH6 color beat 63 66 dBc VRFpix = 80 dBV VRFsnd = 80 dBV7). RF input level without lock-out Input conductance Vi gi gi Input capacitance CMixV 1 1 1 120 dBV mS mS pF
8).
Unit
Test Conditions
L
Item
fRF = 44.25 MHz, see 5.4.1 on page 43 fRF = 170.25 MHz, see 5.4.1 on page 43 fRF = 44.25 to 170.25 MHz, see 5.4.1 on page 43
Mid band mixer mode (P0 = 0, P1 =1, including IF amplifier) RF frequency Voltage gain fRF GV GV Noise figure (not corrected for image) NF NF Output voltage causing 0.3% of crossmodulation in channel VO VO VO VO Local oscillator FM caused by I C communication N+5 - 1 MHz pulling N+5 - 1 MHz 77 80 dBV fRFw = 359.25 MHz, fOSC = 398.15 MHz, fRFu = 399.25 MHz 9).
2
154.25 33 33 36 36 6 6 108 108 111 111
454.25 39 39 8 8 dB dB dB dB dBV dBV
picture carrier 1.) fRF = 154.25 MHz, see 5.5.2 on page 46 fRF = 454.25 MHz, see 5.5.2 on page 46 fRF = 154.25 MHz, see 5.5.5 on page 48 fRF = 300 MHz, see 5.5.5 on page 48 fRF = 154.25 MHz, see 5.5.7 on page 49 fRF = 454.25 MHz, see 5.5.7 on page 49 fRF = 154.25 MHz 2.) fRF = 454.25 MHz 2.) fRF = 454.25 MHz 3.)
Output voltage causing 1.1 kHz incidental FM
108 108
111 111 2.12
dBV dBV kHz
FMI2C
Wireless Components
5 - 33
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with TAMB = 25 C, VCC = 5V (continued) Symbol min 750 Hz Pulling RF input level without lock-out Input impedance Zi = (Rs + jLs) Vi Vi Rs Rs Ls Ls 35 30 5 4.5 78 120 Limit Values typ max dBV dBV nH nH fRF = 439.25 MHz 4.) 8.) fRF = 154.25.25 MHz, see 5.4.2 on page 43 fRF = 454.25 MHz, see 5.4.2 on page 43 fRF = 154.25.25 MHz, see 5.4.2 on page 43 fRF = 454.25 MHz, see 5.4.2 on page 43 Unit Test Conditions L Item
HIGH band mixer mode (P0 = 0, P1 = 0, including IF amplifier) RF frequency Voltage gain fRF GV GV Noise figure (not corrected for image) NF NF Output voltage causing 0.3% of crossmodulation in channel VO VO VO VO Local oscillator FM caused by I2C communication N+5 - 1 MHz pulling FMI2C 108 108 399.25 33 33 36 36 863.25 39 39 dB dB picture carrier 1.) fRF = 407.25 MHz, see 5.5.2 on page 46 fRF = 863.25 MHz, see 5.5.2 on page 46 fRF = 407.25 MHz, see 5.5.5 on page 48 fRF = 863.25 MHz, see 5.5.5 on page 48 fRF = 407.25 MHz, see 5.5.7 on page 49 fRF = 863.25 MHz, see 5.5.7 on page 49 fRF = 407.25 MHz 2.) fRF = 454.25 MHz 2.) fRF = 863.25 MHz 3.)
6 7 111 111
8 9
dB dB dBV dBV
Output voltage causing 1.1 kHz incidental FM
108 108
111 111 2.12
dBV dBV kHz
N+5 - 1 MHz
77
80
dBV
fRFw = 823.25 MHz, fOSC = 862.15 MHz, fRFu =862.25 MHz 9.)
750 Hz Pulling
Vi
78
dBV
fRF = 855.25 MHz 4.)
Wireless Components
5 - 34
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with TAMB = 25 C, VCC = 5V (continued) Symbol min RF input level without lock-out Input impedance Zi = (Rs + jLs) Vi Rs Rs Ls Ls LOW band oscillator, Chapter 4 Oscillator frequency Oscillator frequency shift fOSC fOSC(V) fOSC(V) Oscillator frequency drift fOSC(T) 80 20 110 300 500 210 70 MHz kHz kHz kHz
10).
Limit Values typ max 120 35 30 5 4.5
Unit
Test Conditions
L
Item
dBV nH nH
8.) fRF = 407.25 MHz, see 5.4.3 on page 44 fRF = 863.25 MHz, see 5.4.3 on page 44 fRF = 407.25 MHz, see 5.4.3 on page 44 fRF = 863.25 MHz, see 5.4.3 on page 44
VCC = 5 % 11). VCC = 10 % 11.) T = 25 C, with compensation
12).
Oscillator frequency drift Phase noise, carrier to noise sideband Ripple susceptibility of VP
fOSC(t) OSC 88
150 92
250
kHz dBc/ Hz mV
5 s to 15 min after switch on 13). 10 kHz frequency offset, worst case in frequency range 4.75 V < VP < 5.25 V, worst case in frequency range, ripple frequency 500 kHz
14).
RSC
15
20
MID band oscillator, Chapter 4 Oscillator frequency Oscillator frequency shift fOSC fOSC(V) fOSC(V) Oscillator frequency drift Oscillator frequency drift Phase noise, carrier to noise sideband fOSC(T) fOSC(t) OSC 86 201 20 110 500 250 92 750 500 493 70 MHz kHz kHz kHz kHz dBc/ Hz 10.) VCC = 5 % 11.) VCC = 10 % 11.) T = 25 C; with compensation 12.) 5 s to 15 min after switch on 13.) 10 kHz frequency offset, worst case in frequency range
Wireless Components
5 - 35
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with TAMB = 25 C, VCC = 5V (continued) Symbol min Ripple susceptibility of VP RSC 15 Limit Values typ 20 max mV 4.75 < VP < 5.25 V, worst case in frequency range, ripple frequency 500 kHz
14.)
Unit
Test Conditions
L
Item
HIGH band oscillator, Chapter 4 Oscillator frequency Oscillator frequency shift fOSC fOSC(V) fOSC(V) Oscillator frequency drift Oscillator frequency drift Phase noise, carrier to noise sideband fOSC(T) fOSC(t) OSC 86 435 20 300 600 250 90 1000 500 905 70 MHz kHz kHz kHz kHz dBc/ Hz 10.) VCC = 5 % 11.) VCC = 10 % 11.) T = 25 C; with compensation 12.) 5 s to 15 min after switch on 13). 10 kHz frequency offset, worst case in frequency range 4.75 < VP < 5.25 V, worst case in frequency range, ripple frequency 500 kHz
14.)
Ripple susceptibility of VP
RSC
15
20
mV
IF amplifier Mixer output impedance Yo= Gs+ jCs Gp Cp IF amplifier output impedance Zo = Rs + jLs Rejection at the IF outputs Level of divider interferences in the IF signal Crystal oscillator interferences rejection INTDIV INTXTAL 60 66 20 dBV dBc
15).
3 4 65 20
mS pF nH
at 36 MHz, see 5.4.4 on page 44 at 36 MHz, see 5.4.4 on page 44 at 36 MHz, see 5.4.5 on page 45 at 36 MHz, see 5.4.5 on page 45
RS LS
, worst case
VIF = 100 dBV, worst case in frequency range16). VIF = 100 dBV, worst case in frequency range 17).
Reference frequency rejection
INTREF
60
66
dBc
AGC output AGC take-over point AGCTOP 111 112 113 dBV AL2, AL1, AL0 = 0, 1,0
Wireless Components
5 - 36
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with TAMB = 25 C, VCC = 5VC (continued) Symbol min Source current 1 Source current 2 Peak sink to ground AGC output voltage AGC output voltage RF voltage range to switch the AGC from active to inactive mode AGC output voltage AGC output voltage AGCfast AGCslow AGCpeak VAGCmax VAGCmin AGCSLIP 7.2 185 80 3.3 0 Limit Values typ 9.0 220 100 3.5 max 10.8 264 120 3.7 0.25 0.5 A nA A V V dB maximum level minimum level Unit Test Conditions L Item
AGCRML AGCRMH
0 3 3.5
2.9 VCC0.5 or 4 50
V V
AGC bit high or AGC active AGC bit low or AGC inactive AL2, AL1, AL0 = 1,1,0 0 < VAGC < VCC AL2, AL1, AL0 = 1,1,1 AGC is disabled
AGC leakage current
AGCLEAK
-50
nA
AGC output voltage
AGCOFF
3.3
3.5
VCC0.5 or 4
V
s This value is only guaranteed in lab.
1). The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF). 2). This is the level of the RF unwanted signal (50% amplitude modulated with 1kHz) that causes a 1.1 kHz FM modulation of the local oscillator and thus of the wanted signal; Vwanted = 100 dBV; funwanted = fwanted + 5.5 MHz. 3). Local oscillator FM modulation resulting from I2C communication is measured at the IF output using a modulation analyser with a peak to peak detector ((P+ +P-)/2) and a post detection filter 30 Hz - 200 kHz. The I2C messages are sent to the tuner in such a way that the tuner is addressed but the content of the PLL registers are not altered. The refresh interval between each data set shall be 20 ms to 1s. 4). This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency deviation on the oscillator signal producing sidebands 30 dB below the level of the oscillator signal. 5). Channel S02 beat is the interfering product of fRFpix, fIF and fOSC of channel S02, fBEAT = 37.35 MHz. The possible mechanisms are fOSC - 2 x fIF or 2 x fRFpix - fOSC. 6). Channel A-5 beat is the interfering product of fRFpix, fIF and fOSC of channel A-5; fBEAT= 45.5 MHz. The possible mechanisms are: fOSC - 2 x fIF or 2 x fRFpix - fOSC. 7). Channel 6 beat is the interfering product of fRFpix + fRFsnd - fOSC of channel 6 at 42 MHz. 8). The IF output signal stays stable within the range of the fref step for a low level RF input up to 120 dBV. 9). N+5 -1 MHz is defined as the input level of channel N+5, at frequency 1 MHz lower, causing FM sidebands 30 dB below the wanted carrier. 10). Limits are related to the tank circuit used in the application board (Chapter 4). Frequency bands may be adjusted by the choice of external components. 11). The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free running during this measurement. 12). The frequency drift is defined as a change in oscillator frequency if the ambient temperature varies from Tamb = 25 to 50 C or from Tamb = 25 to 0 C. The oscillator is free running during this measurement.
Wireless Components
5 - 37
Specification, July 2001
TUA6030, TUA6032
Reference
13). The switch-on drift is defined as a change in oscillator frequency between 5 s and 15 min after switch-on. The oscillator is free running during this measurement. 14). The supply ripple susceptibility is measured in the application board (Chapter 4), using a spectrum analyser connected to the IF output. An unmodulated RF signal is applied to the test board RF input. A sinewave signal with a frequency of 500 kHz is superposed onto the supply voltage (see 5.5.8 on page 49). The amplitude of this ripple is adjusted to bring the 500 kHz sidebands around the IF carrier to a level of 53.5 dBc referred to the carrier. 15). This is the level of divider interferences close to the IF frequency. For example channel S3: fOSC = 158.15 MHz, 1/4 fOSC = 39.5375 MHz. Divider interference is measured with the application board (Chapter 4). All ground pins are connected to a single ground plane under the IC. The LOWIN input must be left open (i.e. not connected to any load or cable). The MIDIN and HIGHIN inputs are connected to a hybrid. The measured level of divider interference are influenced by layout, grounding and port decoupling. The measurement results between various applications and the reference board could vary as much as 10 dB. 16). Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be greater than 60 dB for an IF output of 100 dBV. 17). The reference frequency rejection is the level of reference frequency sidebands (e.g. 62.5 kHz) related to the carrier. The rejection has to be greater than 60 dB for an IF output of 100 dBV.
Wireless Components
5 - 38
Specification, July 2001
TUA6030, TUA6032
Reference
5.2 Programming
Table 5-4 Name
Bit Allocation Read / Write Byte MSB bit6 bit5 bit4 Bits bit3 bit2 bit1 LSB Ack
Write Data Address Byte Divider Byte 1 Divider Byte 2 Control byte Bandswitch byte Auxiliary byte 1). Read data Address byte Status byte ADB SB 1 POR 1 FL 0 1 0 1 0 AGC MA1 A2 MA0 A1 R/ W=1 A0 A A ADB DB1 DB2 CB BB AB 1 0 N7 1 P7 ATC 1 N14 N6 CP P6 AL2 0 N13 N5 T2 P5 AL1 0 N12 N4 T1 P4 AL0 0 N11 N3 T0 P3 0 MA1 N10 N2 RSA P2 0 MA0 N9 N1 RSB P1 0 R/ W=0 N8 N0 OS P0 0 A A A A A A
1). AB replaces BB when T2, T1, T0 = 0, 1, 1, see Table 5-7 Test modes on page 40 Table 5-5 Symbol A MA0, MA1 N14 to N0 CP Acknowledge Address selection bits, see Table 5-6 Address selection on page 40 programmable divider bits: N = 214 x N14 + 213 x N13 + ..... + 23 x N3 + 22 x N2 + 21 xN1 + N0 charge pump current bit: bit = 0: charge pump current = 60 A bit = 1: charge pump current = 280A (default) test bits, see Table 5-7 Test modes on page 40 reference divider bits, see Table 5-8 Reference divider ratios on page 40 tuning amplifier control bit: bit = 0: enable VT bit = 1: disable VT (default) PNP ports control bits bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT= VCC-VCESAT NPN ports control bits bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT= VCESAT AGC time constant bit bit = 0: IAGC=220nA; t=2s with C=160nF (default) bit = 1: IAGC=9A; t=50ms with C=160nF Description of Symbols Description
T0, T1, T2 RSA, RSB OS
P0, P1, P2, P3
P4, P5, P6, P7
ATC
Wireless Components
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Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-5 POR FL AGC A0, A1, A2 Table 5-6
Description of Symbols AGC take-over point bits Power-on reset flag; POR =1 at power-on PLL lock flag bit = 1: loop is locked internal AGC flag. AGC=1 when internal AGC is active (level below 3V) digital output of the 5-level ADC Address selection MA1 0 0 1 1 MA0 0 1 0 1
AL0, AL1, AL2
Voltage at AS (0 to 0.1) * VCC open circuit (0.4 to 0.6) * VCC (0.9 to 1) * VCC Table 5-7 Mode Normal operation Normal operation (default) CP is in high-impedance state byte AB will follow (otherwise byte BB will follow) P4 = fdiv output, P5 = fref output not in use not in use not in use Table 5-8 Reference divider ratios fref1). 50 kHz 31.25 kHz 166.7 kHz 62.5 kHz 1). With a 4 MHz quartz Table 5-9 AGC take-over point IF output level, symmetrical mode 115 dBV 115 dBV 112 dBV 109 dBV 106 dBV default mode at POR Remark AL2 0 0 0 0 1 Test modes T2 0 0 0 0 1 1 1 1
T1 0 0 1 1 0 0 1 1
T0 0 1 0 1 0 1 0 1
Reference divider ratio 80 128 24 64
RSA 0 0 1 1
RSB 0 1 0 1
AL1 0 0 1 1 0
AL0 0 1 0 1 0
Wireless Components
5 - 40
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-9 AGC take-over point 103 dBV IAGC = 0 3.5 V External AGC 1). Disabled 2). 1 1 1 0 1 1 1 0 1
1). The AGC detector is disabled. Both the sinking and sourcing current from the IC is disabled. The AGC output goes into a high impedance state and an external AGC source can be connected in parallel and will not be influenced. 2). The AGC detector is disabled and IAGC = 9 A. Table 5-10 A to D converter levels 1). Voltage at ADC (0 to 0.15) * VCC (0.15 to 0.3) * VCC (0.3 to 0.45) * VCC (0.45 to 0.6) * VCC (0.6 to 1) * VCC 1). No erratic codes in the transition Table 5-11 Defaults at power-on reset Name Byte MSB Write Data Address Byte Divider byte 1 Divider byte 2 Control byte Bandswitch byte Auxiliary byte ADB DB1 DB2 CB BB AB 1 0 X 1 0 0 1 X X 1 0 0 0 X X 0 0 1 0 X X 0 0 0 0 X X 1 0 MA1 X X X 0 MA0 X X X 0 R/W=0 X X 1 0 bit6 bit5 bit4 Bits bit3 bit2 bit1 LSB A2 0 0 0 0 1 A1 0 0 1 1 0 A0 0 1 0 1 0
Table 5-12 Internal band selection Band LOW MID HIGH 2). Mixer P0.P1 P1.P0 P0.P1
1).
Oscillator P0.P1 P1.P0 P0.P1
1). Means: (P0 AND NOT P1); that is: LOW mixer is switched on if (P0=1 and P1=0) 2). The HIGH band is selected by default
Wireless Components
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Specification, July 2001
Wireless Components
5.3 I2C Bus Timing Diagram
Start Addressing 1 1 0 0 0 MA1 MA0 R/W Ack. 1st Byte Ack. 2nd Byte Ack. 3rd Byte Ack. 4th Byte Ack.
Stop
5 - 42
Telegram examples:
Abbreviations:
Start-ADB-DB1-DB2-CB-BB-Stop Start-ADB-DB1-DB2-CB-AB-Stop Start-ADB-CB-BB-DB1-DB2-Stop Start-ADB-CB-AB-DB1-DB2-Stop Start-ADB-DB1-DB2-DB1-DB2-Stop
Specification, July 2001
Start= start condition ADB= address byte DB1= prog. divider byte 1 DB2= prog. divider byte 2 CB= Control byte BB= Bandswitch byte AB= Auxiliary byte Stop= stop condition Reference
TUA6030, TUA6032
Start-ADB-DB1-DB2-Stop Start-ADB-CB-BB-Stop Start-ADB-CB-AB-Stop Start-ADB-CB-BB-CB-AB-Stop Start-ADB-CB-AB-CB-BB-Stop
TUA6030, TUA6032
Reference
5.4 Electrical Diagrams
5.4.1
Input admittance (S11) of the LOW band mixer (40 to 140 MHz)
Y0 = 20mS
1
0.9
0.8
1.5
0.7
0.6
0.5
0.4
2 3
1.5 1 0.9 0.8 0.7 0.6 0.5 0.4
0.3
0.3
0.2
0.1
20
10
5
4
3
2
20
4
3
0.4
1.5
5.4.2
Input impedance (S11) of the MID band mixer (150 to 455 MHz)
Z0 = 50
0.7
0.8
0.9
1
1
0.9
0.8
0.6
1.5
0.7
0.6
0.5
2
0.5
2
3
4
5
455 MHz
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.5
150 MHz
10
0
20
20
2
3
4
0 .3
0.4
0.5
0.6
0.7
0.8
0.9
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1
1.5
2
Specification, July 2001
5
0.2
10
0.1
5
0.2
5
0.1
10
10
20
0
4
0.3
3
0.4
0.3
4
0.2 0.2 5
0.1
0.1
10
20
140MHz
TUA6030, TUA6032
Reference
5.4.3
Input impedance (S11) of the HIGH band mixer (450 to 865 MHz)
Z0 = 50
0.7
0.8
0.9
1
0.6
1.5
0.5
2
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 0.9 1
1.5
10
0
20
2
3
4
5
0.3
0.4
0.5
0.6
0.7
0.8
0.9
5.4.4
Output admittance (S22) of the of the Mixer output (30 to 50 MHz)
Y0 = 20mS
1
1
0.9
0.8
1.5
0.7
1.5
0.6
0.5
2
2
0.4
0.3
1.5
1 0.9 0.8
0.7
0.6
0.5
0.4
0.3
0.2
20
4
3
0.4
1.5
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1
0.9
0.8
0.7
0.6
0.5
2
Specification, July 2001
0.2
5
0.1
10
0
Rdiff 38.9 MHz
0.3
0.1
20
10
5
4
3
2
5
0.2
0.2
10
0.1
20
4
3
0.4
3
3
0.3
4
5
4
0.2
865 MHz 450 MHz
10
20
5
0.1
0.1
10
20
TUA6030, TUA6032
Reference
5.4.5
Output impedance (S22) of the IF amplifier (30 to 50 MHz)
Z0 = 50
0.7
0.8
0.9
1
0.6
1.5
0 .5
2
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 0.9 1
1.5
10
0
20
2
3
4
5
0.3
0.4
0 .5
0.6
0.7
0.8
0.9
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1
1.5
2
Specification, July 2001
5
0.2
10
0.1
20
4
3
0.4
3
0.3
0.2
4
5
10
0.1
38.9 MHz
20
TUA6030, TUA6032
Reference
5.5 Measurement Circuits
5.5.1
Gain (GV) measurement in LOW band
LOWIN IFOUT 50 Vmeas RMS Votmeter
Transformer N1 V0 C V'meas N2 50 spectrum analyser
V
50
Vi
Device under Test
IFOUT
N1 : N2 = 10 : 2 turns
GVHF
s s s s
Zi >> 50 => Vi = 2 x Vmeas = 80 dBV Vi = Vmeas + 6dB = 80 dBV V0 = V'meas + 16 dB (transformer ratio N1:N2 and transformer loss Gv = 20 log(V0 / Vi)
5.5.2
Gain (GV) measurement in MID and HIGH bands
50 Vmeas RMS Votmeter
MIDIN IFOUT HIGHIN
Transformer N1 V0 C V'meas N2 50 spectrum analyser
V
50
Vi
Balun 1:1
Device under Test
MIDIN IFOUT HIGHIN
N1 : N2 = 10 : 2 turns
GUHF3
s s s
Vi = Vmeas = 70 dBV V0 = V'meas + 16 dB (transformer ratio N1:N2 and transformer loss Gv = 20 log(V0 / Vi) + 1 dB (1 dB = insertion loss of balun)
Wireless Components
5 - 46
Specification, July 2001
TUA6030, TUA6032
Reference
5.5.3
Matching circuit for optimum noise figure in LOW band
22p In
1n Out 7 turns wire 0.5 mm coil 5.5 mm In
15p
1n Out
22p
50 semi rigid cable 300 mm long 96 pF/m 33dB/100m
22p
NFM
For fRF = 50 MHz
s s
For fRF = 150 MHz
s s
loss = 0 dB image suppression = 16 dB
loss = 1.3 dB image suppression = 13 dB
5.5.4
Noise figure (NF) measurement in LOW band
Noise Source
IN
OUT
LOWIN IFOUT
Transformer N1 C N2
Matching Circuit
Device under Test
IFOUT
Noise Figure Meter
N1 : N2 = 10 : 2 turns NF = NFmeas - loss of matching circuit (dB)
NFVHF
Wireless Components
5 - 47
Specification, July 2001
TUA6030, TUA6032
Reference
5.5.5
Noise figure (NF) measurement in MID and HIGH bands
Noise Source
MIDIN IFOUT HIGHIN
Transformer N1 C N2
Balun 1:1
Device under Test
MIDIN IFOUT HIGHIN
Noise Figure Meter
N1 : N2 = 10 : 2 turns loss of balun = 1 dB NF = NFmeas - loss of balun (dB)
NFUHF3
5.5.6
Cross modulation measurement in LOW band
Vmeas unwanted signal source AM = 30 % A 50 C RMS Votmeter
V
50
LOWIN IFOUT
Transformer N1 V0 C N2
18 dB attenuator 38.9 MHz
Hybrid
50 B wanted signal source D 50
Vi
Device under Test
IFOUT
V
V'meas RMS Votmeter
50 modulation analyser
N1 : N2 = 10 : 2 turns
XVHF
s s s s
Zi >> 50 => Vi = 2 x Vmeas V'meas = V0 - 16 dB (transformer ratio N1:N2 and transformer loss) wanted output signal at fpix, Vo = 100 dBV unwanted output signal at fsnd
Wireless Components
5 - 48
Specification, July 2001
TUA6030, TUA6032
Reference
5.5.7
Cross modulation measurement in MID and HIGH bands
Vmeas unwanted signal source AM = 30 % A 50 C RMS Votmeter
V
50
MIDIN IFOUT HIGHIN Vi
Transformer N1 V0 C N2
18 dB attenuator 38.9 MHz
Hybrid
50 B wanted signal source D 50
Balun 1:1
Device under Test
MIDIN IFOUT HIGHIN
V
V'meas RMS Votmeter
50 modulation analyser
N1 : N2 = 10 : 2 turns
XUHF3
s s s
V'meas = V0 - 16 dB (transformer ratio N1:N2 and transformer loss) wanted output signal at fpix, Vo = 100 dBV unwanted output signal at fsnd
5.5.8
Ripple susceptibility measurement
Vsupply
10 F 6k8 50 BC847B 10 F 500 kHz sine Vripple 50= VCC + V ripple to application board
Circuit to superimpose a 500 kHz ripple on VCC
RIP
Wireless Components
5 - 49
Specification, July 2001

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